2015 Fundamentals Classes

MONDAY, OCTOBER 7 • 1:00pm to 5:00pm
For an additional fee, you can participate in our Fundamentals Classes. Both SOI and SubVT Fundamentals Classes run concurrently and those who purchase the Fundamentals Classes may move freely between the two classes. The Fundamentals Classes run from 1:00 am to 5:00 pm on Wednesday. Fundamental Class Fees.

Logic Devices for 28nm and Beyond

Bulk planar devices at 28nm & transition to fully depleted SOI
Thierry Poiroux, CEA-LETI

Planar FDSOI devices today and next generations. Benefits for Performance and Low Power applications
Philippe Flatresse, STMicroelectronics

FinFETs Benefits for ultimate shrinking and SOI vs Bulk FinFETs
Terry Hook, IBM

2D and 3D SOI MOSFET in a Harsh Environment
Mike Alles, Vanderbilt’s Institute for Space and Defense Electronics

Low-Voltage Logic and Memory Circuits and Power Management

Low-voltage low-power logic and memory circuits
Pascal Meinerzhagen, Intel Circuit Research Lab, Portland

Analog and Digital Integrated Power Management Circuits
Joseph Shor, Bar Ilan University, Israel

(c) Copyright 2015 Joyce Lloyd, IMF
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