Welcome to the
IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference
San Francisco Airport
October 16th thru 19th, 2017
The IEEE SOI-3D-Subthreshold Microelectronics Technology
Unified Conference (IEEE S3S)
The 2017 IEEE S3S Conference will take place October 16th – 19th in San Francisco, CA. This industry-wide event gathers together widely known experts, contributed papers and invited talks focused on SOI Technology, Low-Voltage Devices/Circuits/Architectures, and 3D Integration.
A special focus area of the Conference in 2017 will be on energy efficient computation and communication to empower small systems. This is a timely topic given recent projections that the number of internet –connected devices will grow to 75 billion by 2020. Energy-efficiency is key to enabling small, battery-powered sensors and wireless connectivity hubs. The IEEE S3S organizers are pleased that the core technologies of the S3S Conference are sure to play critical roles in efficient computation and communication in energy starved systems.
In addition to more than 100 contributed and invited papers, the conference will hold two sessions featuring distinguished speakers from industry and academia on the emergence of the Internet of Things, systems engineering of IoT devices, and gaps in current technologies. We hope that these topics will provide inspiration for novel research, development, and collaboration throughout the Conference’s core technology areas.
For the first time, the S3S Conference will be including two Tutorials free-of-charge with Conference registration. The first will cover FDSOI Circuit Design led by industry experts from the SOI Consortium. The second will introduce Technologies for 3D Integration. On Monday, we will also offer a full-day short course on Energy Efficient Computing and Communications including RF circuit technology. Panel Discussions, a Poster Session, and networking opportunities round out the program.
This year we have expanded the range of the “Subthreshold Microelectronics” area to “Low-Voltage Microelectronics”, as with continued device scaling and lowering of threshold voltage the most energy efficient operating point is now often near-threshold and not below threshold.