3D Tutorial

Three dimensional chips stacked using Through Silicon Via (TSV) technology has been under consideration and the subject of intensive research for several years now. This tutorial is included in the conference technical program registration. Presentation materials will be provided on a USB drive.

This tutorial covers the technology, applications, design and CAD for 3DIC. The technology will be introduced, including TSVs, face to face technologies, integration options and interposers. Applications will be discussed as driven by cost, performance and power efficiency needs.

Examples will be given from the commercial world and the author’s own research. CAD and CAD-driven design will be covered including verification, test, and thermal evaluation.

Topics that will be covered are:

Design for 2.5D- and 3D-Stacked ICs
Paul Franzon; North Carolina State University
1. 3DIC Motivation
2. 3DIC Manufacturing
3. 3DIC Design
4. Test
5. Conclusions and Future Perspectives

Overview of Monolithic 3D IC Processing
Zvi Or-Bach, MonolithIC 3D Inc
1. Forming the Silicon Layer: Crystallization, layer transfer
2. Forming Transistors: Modify process, split hot/cold, shield the underlying structure
3. Transfer Yet Align: Smart process, precise bonder, smart alignment
4. Non CMOS Transistors: CNT, mechanical and triode base transistors.
5. New Breakthroughs: Monolithic 3D using current fab process
6. Killer Application: Solving the memory wall

(c) Copyright 2015 Joyce Lloyd, IMF