2017 Short Course

PHILIPPE FLATRESSE; ST Microelectronics (Short Course Chair)

On Thursday, the IEEE S3S Conference will host a full-day FDSOI Short Course, which brings in experts from the academia and industry to teach different aspects of circuit design in FDSOI. The FDSOI Short Course is available for an additional fee and includes a light breakfast and lunch. Presentation materials will be provided on a USB drive.

Given the FDSOI technology offering at multiple foundries and multiple nodes, including 65nm, 28nm and 22nm, we believe this is a unique and timely opportunity for circuit designers to learn first-hand from distinguished experts and bring in their questions and concerns.

In addition to the following lectures, EDA vendors, IP vendors and foundry technologists will be available for in-depth discussions during break-outs and poster session.

Instructors this year include:

Fundamentals of FDSOI Design
Yoshiki Yamamoto; Renesas

Body Biasing Techniques and Body Bias Generators
Andreas Burg; EPFLF

FDSOI Platforms and Applications
Jeff Cunningham; NXP Semiconductors

Ultra-Low Voltage and Ultra-Low Power Designs for IoT
Sebastien Thuries; CEA Leti

High Speed Analog Design
Yusuf Lebleblici; EPFL

Analog and RF Design in FDSOI
Carlo Tinella; Asygn

RF Design in FDSOI
Baudouin Martineau; Leti

(c) Copyright 2015 Joyce Lloyd, IMF
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