2019 Call for Papers
The IEEE SOI-3D-Subthreshold Microelectronics Technology
Unified Conference (IEEE S3S)
This year we welcome papers in the areas of SOI, Low-Voltage Devices, Low-Power Circuits and 3D Integration.
Specifically in the following areas:
Silicon on Insulator (SOI)Technology
- Fully Depleted Silicon on Insulator Technology
- Advanced Materials, Substrate and Processes
- Device Physics, Characterization and Modelling
- Sensors, MEMS, BioMEMS
- Non-Digital Devices and Applications (RF, High-Voltage, Photonics, Analog…)
- Novel SOI Structures, Circuits and Applications
- SOI Design, Circuits and Applications
Low-Voltage Devices
- Low-Dimensional (1D, 2D) Transistors
- Tunnel FETs
- Negative Capacitance FETs
- Piezoelectric FETs
- Nano-Electromechanical Switches
- Low Voltage Memory Technologies
- Metal-Insulator Transitional Devices
- Spintronic Devices
Low-Power Circuits
- Low-Power and Ultra-Low-Power Digital Circuits
- Energy Efficient Designs and Methodologies
- Power Management Techniques
- Asynchronous Circuits
- Energy Harvesting Solutions
- Low Power, Reliable and Resilient Solutions
- Analog/Mixed-Signal Circuits for Wireless Communications
- Innovative ICs
- Near Threshold and Sub-Threshold Designs
- Low Power Applications: IoT, Automotive, Data Mining …
3D Integration
- System in Package
- Through Silicon Via (TSV) Technology
- 3D System Integration
- Fabrication Techniques and Bonding Methods
- Design and Test Methodologies
- Processes for Multi Wafer Stacking
- 3D IC EDA and Design Technology
- Heterogeneous Structures
- 3D Manufacturing and Logistics
- Reliability of 3D Circuits
- Fault Tolerant 3D Designs
2019 Call for Papers
Abstract Submission
Preparation of Abstracts