Deadline for general paper selection closed 10 June 2019 at 11:59 PM PT
Papers of exceptional merit are currently being accepted for our Late News Sessions.
Submitted papers should follow the guidelines of our initial 2019 Call for Papers
Papers need to be received no later than 11:59 pm PDT 23 August 2019 for consideration.
This year we welcome papers in the areas of SOI, Low-Voltage Devices, Low-Power Circuits and 3D Integration.
Specifically in the following areas:
Silicon on Insulator (SOI)Technology
- Fully Depleted Silicon on Insulator Technology
- Advanced Materials, Substrate and Processes
- Device Physics, Characterization and Modelling
- Sensors, MEMS, BioMEMS
- Non-Digital Devices and Applications (RF, High-Voltage, Photonics, Analog…)
- Novel SOI Structures, Circuits and Applications
- SOI Design, Circuits and Applications
Low-Voltage Devices
- Low-Dimensional (1D, 2D) Transistors
- Tunnel FETs
- Negative Capacitance FETs
- Piezoelectric FETs
- Nano-Electromechanical Switches
- Low Voltage Memory Technologies
- Metal-Insulator Transitional Devices
- Spintronic Devices
Low-Power Circuits
- Low-Power and Ultra-Low-Power Digital Circuits
- Energy Efficient Designs and Methodologies
- Power Management Techniques
- Asynchronous Circuits
- Energy Harvesting Solutions
- Low Power, Reliable and Resilient Solutions
- Analog/Mixed-Signal Circuits for Wireless Communications
- Innovative ICs
- Near Threshold and Sub-Threshold Designs
- Low Power Applications: IoT, Automotive, Data Mining …
3D Integration
- System in Package
- Through Silicon Via (TSV) Technology
- 3D System Integration
- Fabrication Techniques and Bonding Methods
- Design and Test Methodologies
- Processes for Multi Wafer Stacking
- 3D IC EDA and Design Technology
- Heterogeneous Structures
- 3D Manufacturing and Logistics
- Reliability of 3D Circuits
- Fault Tolerant 3D Designs
2019 Call for Papers Late News Papers will be accepted until 11:59PM PT – 23 August 2019
Abstract Submission
Preparation of Abstracts