THE SHORT COURSE IS AVAILABLE FOR AN ADDITIONAL FEE AND INCLUDES A LIGHT BREAKFAST AND LUNCH.
PRESENTATION MATERIALS WILL BE PROVIDED ON A USB DRIVE.
Our full day shortcourse about FDSOI is intended for chip designers, technologists and new comers in the field. The tutorials will provide a wide overview of the advantages of FDSOI technology and how to efficiently design innovative circuits for key markets such as automotive and IoT. The lectures will be given by world renown experts from academia and industry. In each field, FDSOI state of the art design techniques and methodologies enabling the development of new and innovative IPs or products will be presented.
The tutorial will beginning at 8am and run until 6pm.
Here’s a quick preview at what each speaker will be addressing during the FDSOI Shortcourse. In addition to the following lectures, EDA vendors, IP vendors and foundry technologists will be available for in-depth discussions during break-outs.
Body Bias Techniques
FDSOI High performance
Power Management IPs
Low Power SoC
Analog, RF and ThZ
Imran Bashir, Cypress Semiconductor, USA
Philippe Flatresse, SOITEC, France
Philippe Flatresse, SOITEC
FD-SOI: How Material & Design Innovations Enable New Market Opportunities
Instructor: Manuel Sellier, SOITEC
Material innovation is at the heart of FD-SOI technology. The very thin and uniform FD-SOI substrate not only boosts the intrinsic performance of the circuit, but also opens the way to new design techniques with the full control of the transistor threshold voltage through the back bias. Something that was before fixed by process is now settable by design. This combination of material and design innovation is now bringing value for a growing number of applications including the Internet of Things (IoT) with ultra-low-power Nb-IoT devices with integrated RF, automotive systems from vision processors for ADAS to infotainment, and mobile connectivity from 5G smartphones to wearable electronics. We will review in this talk what are the key disruptions brought by FD-SOI technology and their benefits at the application point of view.
Enabling Ultra-Low Vmin SRAM Operation in FDSOI Technology
Instructor: Rossella Ranica, STMicroelectronics
An extensive study of key parameters impacting SRAM Vmin and guidelines for its efficient lowering in FDSOI technology will be presented. The challenges to guarantee End-Of-Life SRAM Vmin according to products usage conditions and memory capacity will be discussed. The path towards Ultra Low-Leakage applications thanks to FDSOI technology and Body-Bias technique will be shown.
High Performance Design of ARM CORTEX-A53 Based SOC Using GLOBALFOUNDRIES® 22FDX™
Instructor: Jia Niu, Globalfoundries
Describes how to implement a high performance design with Quad-cores ARM A53 based SOC by using Forward Body-Biasing(FBB) feature of 22FDX™ technology. Also the results of this design has been silicon proven using Dhrystone benchmark.
Power Management IPs in FDSOI for Best in Class Energy Efficiency SOCs Targeting IoT, Automotive and Computing Applications.
Instructor: Lionel Jure, Dolphin Intergration
The energy efficiency becomes a primary concern for both emerging market as IoT and mature markets like automotive and mobile. Combined to a trend to have heterogeneous requirement in term of computing power, it turns to a real challenge to design energy efficient circuit with limited possibilities for playing with voltage level.
Fortunately, the introduction of FD-SOI technology provides another lever to overcome this challenge: body-biasing. In this talk, we will present some mechanism of power optimization using combination of power supply level and body-biasing. We then discuss challenges around their industrial usage prior to give some insight on their implementation Finally, we will present power management solutions and illustrate how it may contribute to design energy efficient edge-node devices.
ID-Xplore: A Disruptive EDA for Emerging Applications of FDSOI Technology
Instructor: Ramy Iskander, Intento Design
A Front-End Migration case of a nonlinear comparator will be presented. It will be shown that ID-Xplore™ can rapidly migrate the comparator from CMOS BULK to the advanced nodes of FDSOI and FinFET technologies.
FDSOI Pre-Silicon PPA Optimization Leveraging Adaptive Body Bias
Instructor: Holger Eiseinreich, Racyics
Adaptive Body Bias (ABB) is mostly used post-silicon to compensate process, temperature and slow voltage variations to optimize performance and power of products implemented by a worst case design approach. This talk presents a methodology and the related IP components to leverage ABB already during the pre-silicon implementation and sign-off phase to significantly improve PPA of FDSOI products. A turnkey ABB IP platform for GLOBALFOUNDRIES’ 22FDX (22nm FDSOI) will be introduced, which guarantees yield for performance and power at sign-off time. Furthermore it enables 22FDX ULV implementations down to 0.4V operating reliable over a large temperature range (-40C … 125C). Besides MCU PPA study results the talk includes 22FDX silicon measurements and volume test statistics.
FDSOI Technologies Pave the Way to Reliable, Safety-Critical Automotive Products
Instructor: Vincent Huard, SOITEC
In the last decade, automotive products have been pushed forward to advanced CMOS nodes with an accelerated pace, mostly driven by the needs for new applications like Autonomous Driving. In parallel, automotive markets are regulated by various reliability and safety norms like AEC-Q100 and/or ISO26262. Finally, the mission profiles of the products are very diverse and are generally very demanding in terms of voltage and temperature excursions as well as in failure rate (typically <1ppm). This course will show how FDSOI technologies present superior advantage compared to other technologies to enable such high-performance critical applications. This advantage is two-fold. On one hand, the technology itself presents features which makes it a good match for such applications. On the other hand, FDSOI offers with body-bias knob through a joint design/test approach a unique feature to manage at anytime reliability and safety altogether with limited performance penalty.
mmW and THz Design Considerations in FDSOI
Instructor: Hani Sherry, TiHive
The Terahertz (THz) electromagnetic domaon (300GHz-3THz) and its market applications have been a buzz amongst researchers, industrials, and marketing communities alike. This frequency spectrum conveys plenty of interactions and fingerprints with matter, millimetre-resolutions and large bandwidths, and safe-operation. Therefore, applications span from radars with fine millimetre range resolutions, security inspection and authentication, non-destructive industrial inspection, and potentially the next generation of wireless communications post-5G.
Traditional THz techniques have failed in large-scale deployment and commercialisation. All-Silicon systems, however, have recently demonstrated capacities beyond CMOS operational limits, thus approaching the THz problem in a radically different way and offering a wide range of new application opportunities.
Through this short course we will explore how the advancements of Silicon process-technologies, coupled with innovative electronic design techniques, can lead to industrially and commercially viable THz systems. We will especially focus on the benefits of advanced process-technologies such as FDSOI and PDSOI, and we will show how each technology can offer interesting features that could be adapted to different markets. This includes the design of highly integrated room-temperature Terahertz multi-pixel detectors and sources equipped with antennas and optical elements, on-chip digital and analogue signal processing, all integrated on millimetre-sized Silicon chips.
We will also elaborate on the importance of comprehensive co-design of the quasi-optical chain from an electrical/electromagnetic/optical viewpoint, to attain optimized performances, and will investigate FDSOI and PDSOI design constraints and workarounds